We have highlighted an underlying physical concept behind the BTBT process that has been mostly overlooked in literature. It has been shown that ignoring the dual nature of electrons and holes during the BTBT phenomenon can not only lead to substantially erroneous results but also to misleading...
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Submission Time |
Conference |
Area |
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January |
VLSI Symposia | VLSI Technology and Circuits |
| IITC | Interconnect Technology | |
| ESD Symposia | Electrical Overstress and Electrostatic Discharge | |
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February |
Low Power Electronic Design |
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| IEEE-Nano |
Nanotechnology |
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March |
Simulation of Semiconductor Processes and Devices |
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Device Research Conference |
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April |
Custom Integrated Circuits Conference |
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Systems-On-Chip (SOC) |
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Computer Aided Design |
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May |
SOI Conference |
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Computer Design |
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| SSDM |
Solid State Devices and Materials |
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June |
International Electron Devices Meeting |
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July |
Design Automation |
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VLSI Design |
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International Workshop on the Physics of Semiconductor Devices |
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August |
VLSI Multi-level Interconnect Conference |
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September |
Design, Automation and Test in Europe |
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Solid State Circuits |
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Quality Electronic Design |
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October |
Circuits and Systems |
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Reliability Physics Symposium |
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Physical Design |
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November |
Design Automation Conference |
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December |
System Level Interconnect Prediction |
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Great Lakes Symposium VLSI |
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NSTI Nanotechnology |

