Jacob Jabbour

Jacob Jabbour was born in Bellevue, WA, USA. He received his B.S./M.S. in Electrical and Computer Engineering at UC Santa Barbara in June 2022. During his graduate studies, he worked in the research group of Prof. Kaustav Banerjee. His research project was focused on developing a parameterized model of 2D-semiconductor channel nanosheet FETs for the design and performance analysis of  various 3D/NanoX transistors. His other research work included developing an experimental 160GHz Receiver chain to be used in a large-scale MIMO array for UCSB’s high-speed electronics group. In Summer 2022, Jacob joined Qualcomm in Santa Clara, working as an RF Design Verification Engineer on a team producing WiFi 7 SoCs.