Sheng-Chih Lin received the B.S. degree in electrical engineering from the National Taiwan University, Taipei, Taiwan, in 1996. From 1998 to 2002, he was with the Phoenixtec Electronics Company, Ltd., and the CHROMA ATE Inc., respectively, in Taiwan. He joined Prof. Banerjee's research group at the University of California, Santa Barbara in Winter 2003 and received the PhD degree in electrical and computer engineering in December 2007. His doctoral thesis focused on the electrothermal modeling and analysis of integrated circuits, variation-aware circuit design and optimization, and power/thermal management for nanoscale CMOS ICs. More specifically, his dissertation involved the development of a self-consistent thermal profile simulation methodology and tool for nanoscale high-performance ICs and its implications for power and thermal management. His doctoral research also introduced a novel technique by which circuit designers can comprehend the implications of design choices on chip-level thermal management issues including packaging/cooling solutions and vice-versa. During the Summer of 2005 and 2006, he worked as an intern in the Assembly and Test Technology Development of Intel in Chandler, AZ. Upon his graduation in 2007, he joined the ATD Division of Intel Corporation in Chandler, Arizona, as a Member of Technical Staff.
During his doctoral work, he authored or coauthored over 15 papers in journals and refereed international conferences as well as a book chapter titled "Thermal Challenges of 3-D ICs" (Springer-Verlag, 2008). One of his co-authored articles "3D Integration for Introspection" published in ASPLOS 2006 was selected in IEEE Micro's Top Picks from various microarchitecture conferences in 2006. His self-consistent thermal profile simulation tool and analysis was highlighted on the Cover Page of IEEE T-ED (January 2008 issue) and was successfully transferred to Intel.