Researchers in electrical and computer engineering at University of California, Santa Barbara have introduced and modeled an integrated circuit design scheme in which transistors and interconnects are monolithically patterned seamlessly on a sheet of graphene, a 2-dimensional plane of carbon atoms. The demonstration offers possibilities for ultra energy-efficient, flexible, and transparent electronics.

First demonstration of graphene’s robustness under Electrostatic Discharge (ESD) recognized with the EOS/ESD symposium’s top technical awards for 2012.

UC Santa Barbara researchers demonstrate first n-type field effect transistors on monolayer tungsten diselenide with record performance.