We have highlighted an underlying physical concept behind the BTBT process that has been mostly overlooked in literature. It has been shown that ignoring the dual nature of electrons and holes during the BTBT phenomenon can not only lead to substantially erroneous results but also to misleading...
Kaustav Banerjee is Professor of Electrical and Computer Engineering and Director of the Nanoelectronics Research Lab at UC Santa Barbara. He is also an Affiliated Faculty with the California NanoSystems Institute (CNSI) and the Institute for Energy Efficiency (IEE) at UCSB. Initially trained as a physicist, he received the Ph.D. degree in Electrical Engineering and Computer Sciences (with minors in Physics and Materials Science) from the University of California, Berkeley, in 1999, working with Prof. Chenming Hu.
His research interests include nanometer scale issues in CMOS VLSI as well as emerging nanoelectronics. He is currently involved in exploring the physics, technology, and applications of low-dimensional nanomaterials for next-generation green electronics, photonics and bioelectronics.
Prior to joining UCSB, he was with Stanford University (1999-2001) as a Research Associate at the Center for Integrated Systems. He has also held a number of summer/visiting positions at Texas Instruments, Dallas (1993-97); École Polytechnique Fédérale de Lausanne, Switzerland (2001); and the Circuit Research Laboratories, Intel Corporation, Hillsboro, Oregon (2002). He currently holds a number of Visiting/Guest Professor appointments at leading Universities in China, Germany, Japan and Singapore.
Prof. Banerjee has made seminal contributions in almost every area he has worked on, and his technical ideas and innovations have seen wide-spread proliferation both in the industry and academia as exemplified by his h-index of 45 (as of June 2013) as well as by their frequent citations and discussions in major scientific and technical forums including Nature. His doctoral research at Berkeley and subsequent work at Stanford on thermal issues in integrated circuits played a pioneering role in introducing the concept of “thermal integrity”, which set the foundation for Gradient Design Automation, the first company to introduce temperature-aware IC design technology in the Electronic Design Automation Industry. He has also made a number of key contributions in the area of nanoscale IC interconnects and innovative interconnect solutions including 3-D ICs and carbon-based interconnects, which have helped shape the semiconductor industry's R&D efforts in those areas.
Prof. Banerjee’s research is chronicled in over 275 journal articles, international refereed conference papers and book chapters, including over 60 invited papers. He has delivered over 100 keynote/plenary & panel speeches, tutorials, and invited talks at major international forums and academic/research institutes around the world. His exceptional research accomplishments and inspirational teaching led to his appointment as Full Professor in 2007 (within 5 years of his joining UCSB as Assistant Professor). In 2011 he was honored with the Friedrich Wilhelm Bessel Research Award by Alexander von Humboldt Foundation in Germany for his outstanding contributions in nanoelectronics. He was elected an IEEE Fellow in Fall 2011, within his first decade in academia. His research and teaching has also been recognized with numerous other awards and honors.
Prof. Banerjee has served on the technical program committees of nearly every leading IEEE/ACM conferences in his area including IEDM, DAC, ICCAD, IRPS and SISPAD. He has also served on many IEEE committees including the IEEE EDS Nanotechnology Committee (2005-2008) and the IEEE EDS VLSI Technology & Circuits Committee. Since 2008, he has been a Distinguished Lecturer of the IEEE Electron Devices Society.