We have highlighted an underlying physical concept behind the BTBT process that has been mostly overlooked in literature. It has been shown that ignoring the dual nature of electrons and holes during the BTBT phenomenon can not only lead to substantially erroneous results but also to misleading...
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Kaustav Banerjee Named 2012 IEEE Fellow! Thursday, January 19, 2012 UCSB College of Engineering Press Release |
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Kaustav Banerjee Wins 2011 ESDA Award for Graphene Electronics Research Tuesday, November 22, 2011 UCSB College of Engineering Press Release |
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Deblina Sarkar Named Winner of IEEE Electron Devices Society's 2011 PhD Fellowship Award Thursday, October 20, 2011 UCSB College of Engineering Press Release |
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NRL Researchers Demonstrate CVD Bilayer Graphene with Record Mobilities Monday, October 17, 2011 UCSB College of Engineering Press Release |
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C. Xu and K. Banerjee, "Compact Capacitance and Capacitive Coupling-Noise Modeling of Through-Oxide Vias in FDSOI Based Ultra-High Density 3-D ICs," IEEE International Electron Devices Meeting (IEDM), Washington DC, Dec. 5-7, 2011 (to appear).
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Wei Liu, Hong Li, Chuan Xu, Yasin Khatami and Kaustav Banerjee, "Synthesis of High-Quality Monolayer and Bilayer Graphene on Copper using Chemical Vapor Deposition," CARBON, Vol. 49, No. 13, pp. 4122-4130, Nov. 2011.
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Xiang Li, Zhixian Chen, Nansheng Shen, Deblina Sarkar, Navab Singh, Kaustav Banerjee, Guo-Qiang Lo and Dim-Lee Kwong, "Vertically Stacked and Independently Controlled Twin-Gate MOSFETs on a Single Si-Nanowire," IEEE Electron Device Letters, Vol. 32, No. 11, pp. 1492-1494, Nov. 2011.
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Ramanathan Gandhi, Zhixian Chen, Navab Singh, Kaustav Banerjee and Sungjoo Lee, "CMOS Compatible Vertical Silicon Nanowire Gate-All-Around p-type Tunneling FETs with ≤50 mV/decade Subthreshold Swing," IEEE Electron Device Letters, Vol. 32, No. 11, pp. 1504-1506, Nov. 2011.
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Chuan Xu, Roberto Suaya and Kaustav Banerjee, "Compact Modeling and Analysis of Through-Si-Via Induced Electrical Noise Coupling in 3-D ICs," IEEE Transactions on Electron Devices, Vol. 58, No. 11, pp. 4024-4034, Nov. 2011.
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Seid Hadi Rasouli, Chuan Xu, Navab Singh and Kaustav Banerjee, "A Physical Model for Work-Function Variation in Ultra-Short Channel Metal-Gate MOSFETs," IEEE Electron Device Letters, Vol. 32, No. 11, pp. 1507-1509, Nov. 2011.
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Chuan Xu, Vassilis Kourkoulos, Roberto Suaya and Kaustav Banerjee, "A Fully Analytical Model for the Series Impedance of Through-Silicon Vias with Consideration of Substrate Effects and Coupling with Horizontal Interconnects," IEEE Transactions on Electron Devices, Vol. 58, No. 10, pp. 3529-3540, Oct. 2011.
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Deblina Sarkar and Kaustav Banerjee, "Metallic-Nanoparticle Assisted Enhanced Band-to-Band Tunneling Current," Applied Physics Letters, Vol. 99, No. 13, p. 133116, Sept 26, 2011.
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Hong Li, Navin Srivastava, Jun-Fa Mao, Wen-Yan Yin and Kaustav Banerjee, "Carbon Nanotube Vias: Does Ballistic Electron-Phonon Transport Imply Improved Performance and Reliability?," IEEE Transactions on Electron Devices, Vol. 58, no. 8, pp. 2689-2701, Aug. 2011.
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Seid Hadi Rasouli, Kazuhiko Endo, Jone F. Chen, Navab Singh and Kaustav Banerjee, "Grain-Orientation Induced Quantum Confinement Variation in FinFETs and Multi-Gate Ultra-Thin Body CMOS Devices and Implications for Digital Design," IEEE Transactions on Electron Devices, Special Issue on "Characterization of Nano CMOS Variability by Simulation and Measurements", Vol. 58, no. 8, pp. 2282-2292, Aug. 2011.
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H. F. Dadgour, M. M. Hussain, A. Cassell, N. Singh and K. Banerjee, "Impact of Scaling on the Performance and Reliability Degradation of Metal-Contacts in NEMS Devices," IEEE International Reliability Physics Symposium (IRPS), Monterey, CA, April 10-14, pp. 280-289, 2011.
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Ramanathan Gandhi, Zhixian Chen, Navab Singh, Kaustav Banerjee, and Sungjoo Lee, "Vertical Si-Nanowire n-Type Tunneling FETs With Low Subthreshold Swing (≤ 50 mV/decade) at Room Temperature," IEEE Electron Device Letters, vol. 32, no. 4, pp. 437-439, April 2011
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D. Sarkar, C. Xu, H. Li, and K. Banerjee, "High-Frequency Behavior of Graphene-Based Interconnects—Part I: Impedance Modeling," IEEE Trans. Electron Devices, vol. 58, no. 3, pp. 843-852, March 2011
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D. Sarkar, C. Xu, H. Li, and K. Banerjee, "High-Frequency Behavior of Graphene-Based Interconnects—Part II: Impedance Analysis and Implications for Inductor Design," IEEE Trans. Electron Devices, vol. 58, no. 3, pp. 853-859, March. 2011
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D. Sarkar, M. Krall, and K. Banerjee, "Electron-hole Duality During Band-to-Band Tunneling Process in Graphene-Nanoribbon Tunnel-Field-Effect Transistors," Applied Physics Letters, 97, No. 26, p. 263109, Dec 27, 2010.
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C. Xu, R. Suaya and K. Banerjee, "Compact Modeling and Analysis of Coupling Noise Induced by Through-Si-Vias in 3-D ICs," IEEE International Electron Devices Meeting (IEDM), San Francisco, CA, Dec. 6-8, pp. 178-181, 2010.
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C. Xu, H. Li, R. Suaya and K. Banerjee, "Compact AC Modeling and Performance Analysis of Through-Silicon Vias (TSVs) in 3-D ICs,"IEEE Transactions on Electron Devices, Vol. 57, No. 12, pp. 3405-3417, Dec. 2010.
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D. Sarkar, N. Singh and K.Banerjee, "A Novel Enhanced Electric-Field Impact-Ionization MOS Transistor,"IEEE Electron Device Letters, Vol. 31, NO. 11, pp. 1175-1177, Nov. 2010.
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H. F. Dadgour, K. Endo, V. De, and K. Banerjee, "Grain-Orientation Induced Work-Function Variation in Nanoscale Metal-Gate Transistors––Part I: Modeling, Analysis, and Experimental Validation,"IEEE Transactions on Electron Devices, Vol. 57, No. 10, pp. 2504-2514, 2010.
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H. F. Dadgour, K. Endo, V. De, and K. Banerjee, "Grain-Orientation Induced Work-Function Variation in Nanoscale Metal-Gate Transistors––Part II: Implications for Process, Device, and Circuit Design, "IEEE Transactions on Electron Devices, Vol. 57, No. 10, pp. 2515-2525, 2010.
- H. Li, C. Xu, and K. Banerjee, “Carbon Nanomaterials: The Ideal Interconnect Technology for Next-Generation ICs,” IEEE Design and Test of Computers, Special Issue on Emerging Interconnect Technologies for Gigascale Integration, vol. 27, no. 4, pp. 20-31, 2010.